Part Number Hot Search : 
2SC3296 DTC143X EL7301 4ALVC A1540 T345N 99603E3 SP491E
Product Description
Full Text Search
 

To Download LT1469ACDF-2-PBF Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 LT1469-2 Dual 200MHz, 30V/s 16-Bit Accurate AV 2 Op Amp FEATURES
n n n n n n n n n n n n n n n
DESCRIPTION
The LT(R)1469-2 is a dual, precision high speed operational amplifier with 16-bit accuracy, decompensated to be stable in a gain of 2 or greater. The combination of precision and AC performance makes the LT1469-2 the optimum choice for high accuracy applications such as DAC current-to-voltage conversion and ADC buffers. The initial accuracy and drift characteristics of the input offset voltage and inverting input bias current are tailored for inverting applications. The 200MHz gain bandwidth ensures high open-loop gain at frequency for reducing distortion. In noninverting applications such as an ADC buffer, the low distortion and DC accuracy allow full 16-bit AC and DC performance. The high slew rate of the LT1469-2 improves large-signal performance in applications such as active filters and instrumentation amplifiers compared to other precision op amps. The LT1469-2 is specified on power supply voltages of 5V and 15V and from -40C to 85C. It is available in an 8-lead SOIC package and a space saving 4mm x 4mm leadless package. For a unity-gain stable op amp with same DC performance, see the LT1469 datasheet.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Stable in Gain AV 2 (AV = -1) 200MHz Gain Bandwidth Product 30V/s Slew Rate Settling Time: 800ns (150V, 10V Step) Specified at 5V and 15V Supplies Maximum Input Offset Voltage: 125V Low Distortion: -96.5dB for 100kHz, 10VP-P Maximum Input Offset Voltage Drift: 3V/C Maximum Inverting Input Bias Current: 10nA Minimum DC Gain: 300V/mV Minimum Output Swing into 2k: 12.8V Input Noise Voltage: 5nV/Hz Input Noise Current: 0.6pA/Hz Total Input Noise Optimized for 1k < RS < 20k Available in 8-Lead Plastic SO and 12-Lead (4mm x 4mm) DFN Packages
APPLICATIONS
n n n n n n
Precision Instrumentation High Accuracy Data Acquisition Systems 16-Bit DAC Current-to-Voltage Converter ADC Buffer Low Distortion Active Filters Photodiode Amplifiers
TYPICAL APPLICATION
16-Bit DAC I-to-V Converter
20pF DAC INPUTS 16 6k 10V
Large-Signal Transient, AV = -1
VS = 15V AV = -1 RF = RG = 2k CF = 22pF
-
1/2 LT1469-2
2k VOUT 50pF 0V 2V/DIV
LTC(R)1597
+
OPTIONAL NOISE FILTER OFFSET: VOS + IB (6k) < 1LSB SETTLING TIME TO 150V = 1.6s SETTLING LIMITED BY 6k AND 20pF TO COMPENSATE DAC OUTPUT CAPACITANCE
14692 TA01a
200ns/DIV
14692 TA02
14692f
1
LT1469-2 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V + to V-).................................36V Input Current (Note 2)..........................................10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4).... -40C to 85C
Specified Temperature Range (Note 5) .... -40C to 85C Maximum Junction Temperature........................... 150C Storage Temperature Range................... -65C to 150C
PIN CONFIGURATION
TOP VIEW OUT A -IN A +IN A V- N/C N/C 1 2 3 4 5 6 A 13 B 12 V+ 11 OUT B 10 -IN B 9 +IN B 8 N/C 7 N/C OUT A 1 -IN A 2 A +IN A 3 V- 4 B 5 6 -IN B +IN B TOP VIEW 8 7 V+ OUT B
DF PACKAGE 12-LEAD (4mm x 4mm) PLASTIC DFN TJMAX = 150C, JA = 37C/W EXPOSED PAD (PIN 13) IS GND, MUST BE CONNECTED TO V-
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150C, JA = 190C/W
ORDER INFORMATION
LEAD FREE FINISH LT1469CS8-2#PBF LT1469IS8-2#PBF LT1469ACDF-2#PBF LT1469AIDF-2#PBF LT1469CDF-2#PBF LT1469IDF-2#PBF TAPE AND REEL LT1469CS8-2#TRPBF LT1469IS8-2#TRPBF LT1469ACDF-2#TRPBF LT1469AIDF-2#TRPBF LT1469CDF-2#TRPBF LT1469IDF-2#TRPBF PART MARKING* 14692 14692 14692 14692 14692 14692 PACKAGE DESCRIPTION 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 12-Lead (4mm x 4mm) Plastic DFN 12-Lead (4mm x 4mm) Plastic DFN 12-Lead (4mm x 4mm) Plastic DFN 12-Lead (4mm x 4mm) Plastic DFN TEMPERATURE RANGE 0C to 70C -40C to 85C 0C to 70C -40C to 85C 0C to 70C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCM = 0V unless otherwise noted.
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS S8 Package LT1469A, DF Package LT1469, DF Package IOS Input Offset Current VSUPPLY 15V 5V 15V 5V 15V 5V 5V to 15V MIN TYP 50 50 50 50 100 150 13 MAX 125 200 125 200 225 300 50 UNITS V V V V V V nA
14692f
ELECTRICAL CHARACTERISTICS
2
LT1469-2 ELECTRICAL CHARACTERISTICS
SYMBOL IB - IB + en in RIN CIN VCM PARAMETER Inverting Input Bias Current Noninverting Input Bias Current Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Input Resistance Input Capacitance Input Voltage Range (Positive) Input Voltage Range (Negative) CMRR Common Mode Rejection Ratio Minimum Supply Voltage PSRR AVOL Power Supply Rejection Ratio Large-Signal Voltage Gain Guaranteed by CMRR Guaranteed by CMRR VCM = 12.5V VCM = 2.5V Guaranteed by PSRR VS = 4.5V to 15V VOUT = 12.5V, RL = 10k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive VOUT = 12.5V, 1mV Overdrive VOUT = 2.5V, 1mV Overdrive VOUT = 0V, 0.2V Overdrive (Note 3) RL = 2k (Note 6) 10V Peak, (Note 7) 3V Peak, (Note 7) f = 100kHz, RL = 2k 10V Step, 0.01%, AV = -1 10V Step, 150V, AV = -1 AV = -1, f = 100kHz VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 2k Per Amplifier 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V 15V 15V 15V 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V VCM = 12.5V (Note 9) VCM = 2.5V (Note 9) VS = 4.5V to 15V (Note 9) 15V 5V 93 93 97 100 100 140 130 100 300 300 200 200 13.0 12.8 3.0 2.8 15 15 25 20 15 0.1Hz to 10Hz f = 10kHz f = 10kHz Common Mode, VCM = 12.5V Differential
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCM = 0V unless otherwise noted.
CONDITIONS VSUPPLY 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 15V 15V 15V 15V 5V 15V 5V 15V 5V 96 96 12.5 2.5 100 50 MIN TYP 3 -10 0.3 5 0.6 240 150 4 13.5 3.6 -14.3 -4.4 110 112 2.5 112 2000 2000 8000 8000 13.6 13.5 3.7 3.6 22 22 40 30 22 475 1160 200 190 650 800 0.02 130 130 4.1 3.8 30 50 2 5 113 115 115 5.2 5 225 350 18 78 4.5 -12.5 -2.5 MAX 10 40 UNITS nA nA VP-P nV/Hz pA/Hz M k pF V V V V dB dB V dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s kHz kHz MHz MHz ns ns dB dB mA mA V V nA nA dB dB dB
14692f
VOUT
Maximum Output Swing
IOUT ISC SR FPBW GBW tS ROUT
Maximum Output Current Output Short-Circuit Current Slew Rate Full-Power Bandwidth Gain Bandwidth Product Settling Time Output Resistance Channel Separation
IS VOS IB- IB+ CMRR PSRR
Supply Current Input Offset Voltage Match Inverting Input Bias Current Match Noninverting Input Bias Current Match Common Mode Rejection Match Power Supply Rejection Match
3
LT1469-2 ELECTRICAL CHARACTERISTICS
SYMBOL VOS PARAMETER Input Offset Voltage
The l denotes the specifications which apply over the full operating temperature range, 0C TA 70C. VCM = 0V unless otherwise noted.
CONDITIONS S8 Package LT1469A, DF Package LT1469, DF Package VSUPPLY 15V 5V 15V 5V 15V 5V 15V 5V 5V to 15V (Note 8) (Note 8) Guaranteed by CMRR Guaranteed by CMRR VCM = 12.5V VCM = 2.5V Minimum Supply Voltage Guaranteed by PSRR VS = 4.5V to 15V VOUT = 12.5V, RL = 10k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive VOUT = 12.5V, 1mV Overdrive VOUT = 2.5V, 1mV Overdrive VOUT = 0V, 0.2V Overdrive (Note 3) RL = 2k (Note 6) f = 100kHz, RL = 2k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 2k Per Amplifier 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V VCM = 12.5V (Note 9) VCM = 2.5V (Note 9) VS = 4.5V to 15V (Note 9) 15V 5V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 15V 5V 15V 5V 15V 5V

MIN
TYP
MAX 350 350 225 275 450 450
UNITS V V V V V V V/C V/C nA pA/C nA pA/C nA V V
VOS/T IOS IOS/T IB - IB-/T IB + VCM
Input Offset Voltage Drift Input Offset Current Input Offset Current Drift Inverting Input Bias Current Inverting Input Bias Current Drift Noninverting Input Bias Current Input Voltage Range (Positive) Input Voltage Range (Negative)
(Note 8)
1 1 60
5 3 80 20
40 60 12.5 2.5 -12.5 -2.5 94 94 4.5 95 100 100 100 100 12.9 12.7 2.9 2.7 12.5 12.5 17 18 13 130 120 98 98 6.5 6.3 600 600 38 118 91 91 92 200 190
V V dB dB V dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s MHz MHz dB dB mA mA V V nA nA dB dB dB
14692f
CMRR
Common Mode Rejection Ratio
PSRR AVOL
Power Supply Rejection Ratio Large-Signal Voltage Gain
VOUT
Maximum Output Swing
IOUT ISC SR GBW
Maximum Output Current Output Short-Circuit Current Slew Rate Gain Bandwidth Product Channel Separation
IS VOS IB - IB + CMRR PSRR
Supply Current Input Offset Voltage Match Inverting Input Bias Current Match Noninverting Input Bias Current Match Common Mode Rejection Match Power Supply Rejection Match
4
LT1469-2 ELECTRICAL CHARACTERISTICS
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS S8 Package LT1469A, DF Package LT1469, DF Package VOS/T IOS IOS/T IB - IB-/T IB + VCM Input Offset Voltage Drift Input Offset Current Input Offset Current Drift Inverting Input Bias Current Inverting Input Bias Current Drift Noninverting Input Bias Current Input Voltage Range (Positive) Input Voltage Range (Negative) CMRR Common Mode Rejection Ratio Minimum Supply Voltage PSRR AVOL Power Supply Rejection Ratio Large-Signal Voltage Gain Guaranteed by CMRR Guaranteed by CMRR VCM = 12.5V VCM = 2.5V Guaranteed by PSRR VS = 4.5V to 15V VOUT = 12,5V, RL = 10k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive RL = 10k, 1mV Overdrive RL = 2k, 1mV Overdrive VOUT = 12.5V, 1mV Overdrive VOUT = 2.5V, 1mV Overdrive VOUT = 0V, 0.2V Overdrive (Note 3) RL = 2k (Note 6) f = 100kHz, RL = 2k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 2k Per Amplifier 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V VCM = 12.5V (Note 9) VCM = 2.5V (Note 9) VS = 4.5V to 15V (Note 9) 15V 5V (Note 8) (Note 8) (Note 8)
The l denotes the specifications which apply over the full operating temperature range, -40C TA 85C, VCM = 0V unless otherwise noted. (Note 5)
VSUPPLY 15V 5V 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 15V 5V 15V 5V 15V 5V

MIN
TYP
MAX 500 500 300 350 600 600
UNITS V V V V V V V/C V/C nA pA/C nA pA/C nA V V
1 1 120
6 5 120 40
80 80 12.5 2.5 -12.5 -2.5 92 92 93 75 75 75 75 12.8 12.6 2.8 2.6 7 7 12 15 11 110 100 96 96 7 6.8 800 800 78 158 89 89 90 200 190 4.5
V V dB dB V dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s MHz MHz dB dB mA mA V V nA nA dB dB dB
14692f
VOUT
Maximum Output Swing
IOUT ISC SR GBW
Maximum Output Current Output Short-Circuit Current Slew Rate Gain Bandwidth Product Channel Separation
IS VOS IB - IB + CMRR PSRR
Supply Current Input Offset Voltage Match Inverting Input Bias Current Match Noninverting Input Bias Current Match Common Mode Rejection Match Power Supply Rejection Match
5
LT1469-2 ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes and two 100 series resistors. If the differential input voltage exceeds 0.7V, the input current should be limited to less than 10mA. Input voltages outside the supplies will be clamped by ESD protection devices and input currents should also be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note 4: The LT1469C-2 and LT1469I-2 are guaranteed functional over the operating temperature range of - 40C to 85C. Note 5: The LT1469C-2 is guaranteed to meet specified performance from 0C to 70C and is designed, characterized and expected to meet specified performance from -40C to 85C but is not tested or QA sampled at these temperatures. The LT1469I-2 is guaranteed to meet specified performance from -40C to 85C. Note 6: Slew rate is measured between 8V on the output with 12V swing for 15V supplies and 2V on the output with 3V swing for 5V supplies. Tested in AV = -10 Note 7: Full-power bandwidth is calculated from the slew rate. FPBW = SR/2VP. Note 8: This parameter is not 100% tested. Note 9: CMRR and PSRR are defined as follows: 1) CMRR and PSRR are measured in V/V on each amplifier; 2) the difference between the two sides is calculated in V/V; 3) the result is converted to dB.
TYPICAL PERFORMANCE CHARACTERISTICS
Distribution of Input Offset Voltage
50 VS = 15V TA = 25C PERCENTAGE OF UNITS (%) PERCENTAGE OF UNITS (%) 40 30 40 VS = 15V TA = 25C 5 SUPPLY CURRENT (mA) 25C 4
Distribution of Inverting Input Bias Current
6
Supply Current vs Supply Voltage and Temperature
85C
30
20
20
3 -40C 2
10
10
0 75 125 -175 -125 -75 -25 25 INPUT OFFSET VOLTAGE (V)
175
0 -10 -7.5 -5 -2.5 0 2.5 5 7.5 INVERTING INPUT BIAS CURRENT (nA)
10
1
0
5 10 15 SUPPLY VOLTAGE (V)
20
14692 G03
14692 G01
14692 G02
Input Noise Spectral Density
1000 INPUT VOLTAGE NOISE (nV/Hz) VS = 15V TA = 25C AV = 101 RS = 100k FOR in 1 10 INPUT CURRENT NOISE (pA/Hz)
0.1Hz to 10Hz Voltage Noise
VS = 15V TA = 25C TOTAL NOISE VOLTAGE (nV/Hz) VOLTAGE NOISE (100nV/DIV) 100
Total Noise vs Unmatched Source Resistance
VS = 15V TA = 25C f = 10kHz 10 TOTAL NOISE RESISTOR NOISE ONLY 1
RS
100
in
en 10 0.1
+ -
1 1 10 100 1k FREQUENCY (Hz) 10k
0.01 100k
14692 G04
TIME (1s/DIV)
14692 G05
0.1 10 1k 10k 100 SOURCE RESISTANCE, RS () 100k
14692 G06
14692f
6
LT1469-2 TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current vs Temperature
30 VS = 15V 20 INPUT BIAS CURRENT (nA) INPUT BIAS CURRENT (nA) 10 0 -10 -20 -30 -40 -50 -25 IB+ IB- 60 40 20 0 -20 -40 -60 50 25 75 0 TEMPERATURE (C) 100 125 -80 -15 5 10 0 INPUT COMMON MODE VOLTAGE (V) -10 -5 15 IB- IB+ 80 VS = 15V TA = 25C COMMON MODE RANGE (V)
Input Bias Current vs Input Common Mode Voltage
V+ -0.5 -1.0 -1.5 -2.0
Input Common Mode Range vs Supply Voltage
TA = 25C VOS < 100V
2.0 1.5 1.0 0.5 V- 0 3 9 12 6 SUPPLY VOLTAGE (V) 15 18
14692 G07
14692 G08
14692 G09
Output Voltage Swing vs Supply Voltage
V+ -1 OUTPUT VOLTAGE SWING (V) -2 -3 -4 4 3 2 1 V- 0 TA = 25C RL = 2k RL = 10k 10 15 5 SUPPLY VOLTAGE (V) 20
14692 G10
Output Voltage Swing vs Load Current
V+ -0.5 -1.0 OUTPUT VOLTAGE SWING (V) -1.5 -2.0 -2.5 25C -40C OUTPUT SHORT-CIRCUIT CURRENT (mA) VS = 15V 60 85C 55 50 45 40 35 30 25 20 15
Output Short-Circuit Current vs Temperature
VS = 15V VIN = 0.2V SOURCE SINK
RL = 10k RL = 2k
2.5 2.0 1.5 1.0 -40C 25C
85C
V- 0.5 -20 -15 -10 -5 0 10 5 OUTPUT CURRENT (mA)
15
20
10 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
14692 G11
14692 G12
Open-Loop Gain vs Resistive Load
140 135 OPEN-LOOP GAIN (dB) OPEN-LOOP GAIN (dB) VS = 5V 130 125 VS = 15V 120 115 110 10 100 1k LOAD RESISTANCE () 10k
14692 G13
Open-Loop Gain vs Temperature
160 RL = 2k OFFSET VOLTAGE DRIFT (V) VS = 5V 140 130 120 110 100 90 -50 -25 VS = 15V 10 0 -10 -20 -30 -40 -50 -60 -70 50 25 75 0 TEMPERATURE (C) 100 125 -80 150
Warm-Up Drift vs Time
TA = 25C
S0-8 5V
S0-8 15V
0
20
40 60 80 100 120 TIME AFTER POWER UP (s)
140
14692 G15
14692 G14
14692f
7
LT1469-2 TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain and Phase vs Frequency
70 60 50 GAIN (dB) 40 30 20 GAIN PHASE 100 80 60 GAIN (dB) 40 20 0 PHASE (DEG) 6
Gain vs Frequency, AV = -1
TA = 25C 5 AV = -1 4 RF = RG = 2k CF = 6.8pF 3 RL = 500 2 1 0 -1 -2 -3 -40 -60 100M
14692 G16
Output Impedance vs Frequency
100 VS = 15V TA = 25C 10 OUTPUT IMPEDANCE () AV = 100 1 AV = 10 0.1 AV = -1 0.01
CL = 100pF CL = 47pF CL = 22pF
TA = 25C 10 AV = -1 RF = RG = 5.1k 0 CF = 5pF RL = 2k -10 100k 10k 1M 10M FREQUENCY (Hz)
NO CL
-20
-4 -5 100k 1M 10M FREQUENCY (Hz) 100M
14692 G17 14692 G18
0.001 10k
100k
1M 10M FREQUENCY (Hz)
100M
Undistorted Output Swing vs Frequency, VS = 15V
30 OUTPUT VOLTAGE SWING (VP-P) OUTPUT VOLTAGE SWING (VP-P) 25 AV = -1 20 15 10 VS = 15V 5 TA = 25C RL = 2k THD<1% 0 1 10 9 8
Undistorted Output Swing vs Frequency, VS = 5V
10 8 6 OUTPUT STEP (V) 4 2 0 -2 -4 -6 -8 -10 1000 2000
14692 G20
Settling Time vs Output Step, AV = -1
VS = 15V TA = 25C RF = RG = 2.5k RL = 2.5k INTO DIODES CF = 8pF 150V 0.01% 0.1%
7 6 5 4 3 V = 5V 2S TA = 25C 1 RL = 2k THD<1% 0 1 10 100 FREQUENCY (kHz) AV = -1
0.1% 150V 0.01% 0 100 200 300 400 500 600 700 800 900 1000 SETTLING TIME (ns)
14692 G21
10 100 FREQUENCY (kHz)
1000
14692 G19
Settling Time vs Output Step, AV = 2
10 8 6 OUTPUT STEP (V) 4 2 0 -2 -4 -6 -8 -10 0.01% VS = 15V TA = 25C RF = RG = 1k RL = 2.5k INTO DIODES CF = 22pF RS = 511//30pF 20mV/DIV 0.01%
Small-Signal Transient, AV = -1
VS = 15V 10V
Large-Signal Transient, AV = -1
VS = 15V AV = -1 RF = RG = 2k CL = 22pF
2V/DIV
0V
50ns/DIV
14692 G23
200ns/DIV
14692 G24
0 100 200 300 400 500 600 700 800 900 1000 SETTLING TIME (ns)
14692 G22
14692f
8
LT1469-2 APPLICATIONS INFORMATION
Gain of 2 Stable The LT1469-2 is a decompensated version of the LT1469. The DC precision performance is identical, but the internal compensation capacitors have been reduced to a point where the op amp needs a gain of 2 or greater in order to be stable. In general, for applications where the gain around the op amp is 2, the decompensated version should be used, because it will give the best AC performance. In applications where the gain is <2, the unity-gain stable version should be used. The appropriate way to define the `gain' is as the inverse of the feedback ratio from output to differential input, including all relevant parasitics. Moreover, as with all feedback loops, the stability of the loop depends on the value of that feedback ratio at frequencies where the total loop-gain would cross unity. Therefore, it is possible to have circuits in which the gain at DC is lower than the gain at high frequency, and these circuits can be stable even with a non unity-gain stable op amp. An example is many current-output DAC buffer applications. Layout and Passive Components The LT1469 requires attention to detail in board layout in order to maximize DC and AC performance. For best AC results (for example, fast settling time) use a ground plane, short lead lengths and RF quality bypass capacitors (0.01F to 0.1F) in parallel with low ESR bypass capacitors (1F to 10F tantalum). For best DC performance, use "star" grounding techniques, equalize input trace lengths and minimize leakage (e.g., 1.5G of leakage between an
CF +IN RG RF
input and a 15V supply will generate 10nA--equal to the maximum IB - specification). Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs: for inverting configurations tie the ring to ground, in noninverting connections tie the ring to the inverting input (note the input capacitance will increase which may require a compensating capacitor as discussed below). Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the inputs can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short and the two input leads should be as close together as possible and maintained at the same temperature. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause peaking or even oscillations. A feedback capacitor of value CF = RG * CIN/RF may be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is one, and a large feedback resistor is used, CF should be less than or equal to one half of CIN. An example would be a DAC I-to-V converter as shown on the front page of the data sheet where the DAC can have many tens of picofarads of output capacitance.
V+
R1 100 Q1
R1 Q2 100
-IN
-
CIN 1/2 LT1469-2 VIN VOUT V-
14692 F02
+
14692 F01
Figure 1. Nulling Input Capacitance
Figure 2. Input Stage Protection
14692f
9
LT1469-2 APPLICATIONS INFORMATION
Input Considerations Each input of the LT1469 is protected with a 100 series resistor and back-to-back diodes across the bases of the input devices. If large differential input voltages are anticipated, limit the input current to less than 10mA with an external series resistor. Each input also has two ESD clamp diodes--one to each supply. If an input is driven beyond the supply, limit the current with an external resistor to less than 10mA. The LT1469 employs bias current cancellation at the inputs. The inverting input current is trimmed at zero common mode voltage to minimize errors in inverting applications such as I-to-V converters. The noninverting input current is not trimmed and has a wider variation and therefore a larger maximum value. As the input offset current can be greater than either input current, the use of balanced source resistance is NOT recommended as it actually degrades DC accuracy and also increases noise. The input bias currents vary with common mode voltage. The cancellation circuitry was not designed to track this common mode voltage because the settling time would have been adversely affected. The LT1469 inputs can be driven to the negative supply and to within 0.5V of the positive supply without phase reversal. As the input moves closer than 0.5V to the positive supply, the output reverses phase. Total Input Noise The total input noise of the LT1469 is optimized for a source resistance between 1k and 20k. Within this range, the total input noise is dominated by the noise of the source resistance itself. When the source resistance is below 1k, voltage noise of the amplifier dominates. When the source resistance is above 20k, the input noise current is the dominant contributor.
SIMPLIFIED SCHEMATIC
V+ I1 I2 Q8 +IN Q1 Q2 -IN Q5 Q6 Q7 Q3 Q4 BIAS C Q11 I5 Q10 Q9 OUT
I3 V-
I4
I6
14692 SS
14692f
10
LT1469-2 PACKAGE DESCRIPTION
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(Reference LTC DWG # 05-08-1610)
.045 .005 .050 BSC
8 .189 - .197 (4.801 - 5.004) NOTE 3 7 6 5
.245 MIN
.160 .005 .228 - .244 (5.791 - 6.197)
.150 - .157 (3.810 - 3.988) NOTE 3
.030 .005 TYP
RECOMMENDED SOLDER PAD LAYOUT .010 - .020 x 45 (0.254 - 0.508) .008 - .010 (0.203 - 0.254) .016 - .050 (0.406 - 1.270) 0- 8 TYP
1
2
3
4
.053 - .069 (1.346 - 1.752)
.004 - .010 (0.101 - 0.254)
NOTE: 1. DIMENSIONS IN
.014 - .019 (0.355 - 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.050 (1.270) BSC
SO8 0303
DF Package 12-Lead Plastic DFN (4mm x 4mm)
(Reference LTC DWG # 05-08-1773 Rev O)
2.50 REF 0.70 0.05 4.00 0.10 (4 SIDES) 2.50 REF
7
12 0.40 0.10
4.50 0.05 3.10 0.05
3.38 0.05 2.65 0.05
3.38 0.10 2.65 0.10
PACKAGE OUTLINE 0.25 0.05 0.50 BSC 0.200 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 TOP MARK (NOTE 6) 6 R = 0.115 TYP 0.75 0.05 1 0.25 0.05 0.50 BSC
PIN 1 NOTCH R = 0.20 TYP OR 0.35 x 45 CHAMFER
(DF12) DFN 0806 REV O
BOTTOM VIEW--EXPOSED PAD
0.00 - 0.05 NOTE: 1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)--TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
14692f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LT1469-2 RELATED PARTS
PART NUMBER LT1167 LT1468 LTC1595/LTC1596 LTC1597 LTC1604 LTC1605 DESCRIPTION Precision Instrumentation Amplifier Single 90MHz, 22V/s, 16-Bit Accurate Op Amp 16-Bit Serial Multiplying IOUT DAC 16-Bit Parallel Multiplying IOUT DAC 16-Bit, 333ksps Sampling ADC Single 5V, 16-Bit, 100ksps Sampling ADC COMMENTS Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain Nonlinearity 75V Max VOS, Single Version of LT1469 1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade 1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors 2.5V Input, SINAD = 90dB, THD = -100dB Low Power, 10V Inputs, Parallel/Byte Interface
14692f
12 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0808 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2008


▲Up To Search▲   

 
Price & Availability of LT1469ACDF-2-PBF

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X